Results 1 to 8 of 8

Thread: MakeFile problem

  1. #1
    Join Date
    Nov 2010
    Location
    Damanhour-North-Egypt
    Posts
    90

    Default MakeFile problem

    hello every one ,

    i was developing a project in C that splitted into multi Source Code files rapidly

    let us say that i have 5 source code files (sorted by dependence first depend on nothing):


    str_length.c
    str_compare.c
    dic_length.c
    word_look.c
    main_code.c

    now I’ve a Make-file to Compile/Link those files using the GNU C Compiler:

    Code:
    SRC = str_length.c str_compare.c dic_length.c word_look.c main_code.c
    OBJ = str_length.o str_compare.o dic_length.o word_look.o main_code.o
    PROG = /home/mostafa/build/dictionary.exe
    
    $(PROG) : $(OBJ)
    	gcc $(OBJ) -o $(PROG)
    
    $(OBJ) : $(SRC)
    	gcc $(SRC) -c -g
    the MakeFile works greatly but the Problem is
    if i edited any of the source code files and then recall make all of the source code files are recompiled ...

    now i really want that only the edited one get recompiled ...??

  2. #2
    Join Date
    Jun 2008
    Location
    UTC+10
    Posts
    9,683
    Blog Entries
    4

    Default Re: MakeFile problem

    The problem is that you state that OBJ depends on all the SRC. You have to write a generic rule that says a .o file depends on the corresponding .c file. Here's one I use for processing LaTeX files. I'm sure you can make the appropriate change for your case.

    Code:
    %.dvi:  %.tex
            pslatex $<
    If you don't understand the use of $< for example, then this is encouragement to read the make docs.

  3. #3
    Join Date
    Nov 2010
    Location
    Damanhour-North-Egypt
    Posts
    90

    Default Re: MakeFile problem

    well ,i've changed the makefile code to look like that :

    Code:
    SRC = str_length.c str_compare.c dic_length.c word_look.c main_code.c
    OBJ = str_length.o str_compare.o dic_length.o word_look.o main_code.o
    PROG = /home/mostafa/build/dictionary.exe
    
    $(PROG) : $(OBJ)
    	gcc $(OBJ) -o $(PROG)
    
    %.obj : %.c
    	gcc -c -g $(SRC)
    but it seems that make doesn't use the correct compilation debug option ???

  4. #4
    Join Date
    Jun 2008
    Location
    UTC+10
    Posts
    9,683
    Blog Entries
    4

    Default Re: MakeFile problem

    Object files end in .o on Linux/Unix.

  5. #5
    Join Date
    Nov 2010
    Location
    Damanhour-North-Egypt
    Posts
    90

    Default Re: MakeFile problem

    Object files end in .o on Linux/Unix.
    i don't know why you said that ?????????????????????????????????

    any way ,i ment to say that i want to pass a debug option to the compiler -g

  6. #6
    Join Date
    Jun 2008
    Location
    UTC+10
    Posts
    9,683
    Blog Entries
    4

    Default Re: MakeFile problem

    Can't you see the typo in your rule? Second line from bottom.

    And stop naming your executables .exe. Obviously you're a Windows refugee.

  7. #7
    Join Date
    Nov 2010
    Location
    Damanhour-North-Egypt
    Posts
    90

    Default Re: MakeFile problem

    Can't you see the typo in your rule? Second line from bottom.
    no i really didn't know .obj should be .o

    I’ve one last question(i hope) :

    what is the difference between
    Code:
    %.o : %.c
    and
    Code:
    .c.o:
    _______________________________________________________________
    Code:
    $<
    and
    Code:
    $*.c $*.o
    Obviously you're a Windows refugee.
    well I’ve been a "visual studio slave" for some time and i really intend to break out to freedom

  8. #8
    Join Date
    Jun 2008
    Location
    UTC+10
    Posts
    9,683
    Blog Entries
    4

    Default Re: MakeFile problem

    Quote Originally Posted by mostafaxxx View Post
    no i really didn't know .obj should be .o
    Then you didn't understand the rule at all. The rule says, to make a .o from a .c, apply this command. Since there are no .obj files needed, your old rule was never needed, so GNU make applied a builtin one that didn't use -g. When you fixed the rule, it overrode the builtin one and you got what you wanted.

    %.c is an example of a pattern rule, while .c.o is an example of a suffix rule. GNU make supports both, but the suffix rules are older and regarded as obsolete because pattern rules are more versatile.

    The documentation for GNU make can be accessed by info make, or you can read it online here: GNU `make' There are other tutorials you can find on the Net, do a search for gnu make tutorial. Have fun.

Posting Permissions

  • You may not post new threads
  • You may not post replies
  • You may not post attachments
  • You may not edit your posts
  •